1. Field of the Invention
The present invention relates to interface circuits for dynamic random access memory circuits (DRAMs), and more particularly to off-chip driver (OCD) and receiver circuits for multiple voltage level DRAM circuits.
2. Background Art
DRAMs that operate with multiple voltage levels, such as 5 volt and 3 volt parts, use a different metal level for each voltage. The base design of the DRAM is thus "personalized" and the off-chip driver and receiver circuits are optimized for their respective voltage of operation, for example, in either a 3 volt or a 5 volt environment.
The personalization fabrication mask and the resulting two voltage parts must be managed through wafer and module build and test. This results in increased complexity and cost. An omission of the personalization masks reduces the complexity and cost, but results in a non-optimum design point for either or both of the 3 volt or 5 volt off-chip drivers and receivers.
The following U.S. patents represent typical background references related to the present invention.
U.S. Pat. No. 5,663,663 issued Sep. 2, 1997 to Cao et al. entitled MIXED VOLTAGE INTERFACE CONVERTER.
U.S. Pat. No. 5,479,123 issued Dec. 26, 1995 to Gist et al. entitled EXTERNALLY PROGRAMMABLE INTEGRATED BUS TERMINATOR FOR OPTIMIZING SYSTEM BUS PERFORMANCE.
U.S. Pat. No. 5,469,082 issued Nov. 21, 1995 to Bullinger et al. entitled PERIPHERAL COMPONENT INTERFACING SYSTEM WITH BUS VOLTAGE/LOGIC SUPPLY COMPARISON MEANS.
U.S. Pat. No. 5,066,873 issued Nov. 19, 1991 to Chan et al. entitled INTEGRATED CIRCUITS WITH REDUCED SWITCHING NOISE.
U.S. Pat. No. 5,021,684 issued Jun. 4, 1991 to Ahuja et al. entitled PROCESS SUPPLY, TEMPERATURE COMPENSATING CMOS OUTPUT BUFFER.
U.S. Pat. No. 4,719,372 issued Jan. 12, 1988 to Chappell et al. entitled MULTIPLYING INTERFACE CIRCUIT FOR LEVEL SHIFTING BETWEEN FET AND TTL LEVELS.